Communication scheme between programmable sub-cores in an emulation environment
US8352242B2 · kind B2 · utility
6Cited by
24References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 21, 2007 |
| Grant date | Jan 8, 2013 |
| Priority date | — |
| Expiry date | Apr 4, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method are disclosed for communicating in a programmable core. The programmable core is within a single integrated circuit and is divided into multiple independent sub-cores. The sub-cores are coupled together using a multiplexer based network. In another aspect, the multiplexer-based network includes multiplexers associated with some of the sub-cores for sending data and demultiplexers associated with other sub-cores for receiving data. In yet another aspect, a clock is included in the multiplexer-based network for synchronizing communication between the multiplexers and demultiplexers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.