Speech recognition circuit and method
US8352262B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2011 |
| Grant date | Jan 8, 2013 |
| Priority date | — |
| Expiry date | Jun 16, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG10L15/285
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A speech recognition circuit comprising a circuit for providing state identifiers which identify states corresponding to nodes or groups of adjacent nodes in a lexical tree, and for providing scores corresponding to said state identifiers, the lexical tree comprising a model of words; a memory structure for receiving and storing state identifiers identified by a node identifier identifying a node or group of adjacent nodes, the memory structure being adapted to allow lookup to identify particular state identifiers, reading of the scores corresponding to the state identifiers, and writing back of the scores to the memory structure after modification of the scores; an accumulator for receiving score updates corresponding to particular state identifiers from a score update generating circuit which generates the score updates using audio input, for receiving scores from the memory structure, and for modifying the scores by adding the score updates to the scores; and a selector circuit for selecting at least one node or group of adjacent nodes of the lexical tree according to the scores.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.