Checking method and electronic circuit for the secure serial transmission of data
US8352809B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2008 |
| Grant date | Jan 8, 2013 |
| Priority date | — |
| Expiry date | Aug 19, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2001/0094
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A checking method in which serial data protected by check data are transmitted via a serial data bus from a transmitter to a receiver, the receiver then conditions the data and compares them with the transmitted check data in order to recognize transmission errors, wherein the transmitter bases the production of the check data and the receiver bases the conditioning of the data on the same check data formation method, wherein the check data formation/conditioning is performed using error recognition hardware, wherein the region of the receiver contains not only the error recognition hardware but also error recognition software which are used to additionally check the received data, and wherein also an error in the transmitted data and/or check data is caused by a transmitter-end error stimulation. A transmission and reception circuit for carrying out the above method and also the use thereof is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.