Patent · US Active

Method for testing a memory device, as well as a control device having means for testing a memory

US8352817B2 · kind B2 · utility

1Cited by

4References

9Claims

0Family size

Assignee

Robert Bosch GmbH · DE

Inventors

Klaus-Peter Mattern · Beilstein, DE
Carsten Gebauer · Eppelheim, DE
Harald Tschentscher · Bornsteiner Straße, DE

Key dates

Filing date	Mar 17, 2010
Grant date	Jan 8, 2013
Priority date	—
Expiry date	Dec 30, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/10
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method for testing a memory and a control device having means for a memory test. A destination address of the memory is selected in the process, dependent addresses of the memory are determined from the destination address, and user data at the destination address and the dependent addresses are backed up. Furthermore, the destination address and the dependent addresses are described by test patterns, via which a signature is formed. The backed-up user data of the destination address and the dependent addresses are then restored. Finally, the determined signature is compared with the known setpoint value. In the event of a deviation between the signature and the setpoint value, suitable protective mechanisms are initiated.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.