Patent · US Active

Algorithm to share physical processors to maximize processor cache usage and topologies

US8352950B2 · kind B2 · utility

2Cited by
4References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 11, 2008
Grant dateJan 8, 2013
Priority date
Expiry dateJun 22, 2031

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F9/5077
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and apparatus for use in a computing environment to run a variety of applications in logical partitions. The apparatus includes one or more logical processors (LPs), one or more logical partitions (LPARs) configured to each access a share of processing resources of the LPs in accordance with predefined instructions, and an LPAR manager configured to determine an operational mode of each of the LPARs and any available amount of an excess of the share of the processing resources of the LPs and to dispatch the processing resources of at least a subset of the LPs to the LPARs in accordance with the respective predetermined shares and with respect to the determined operational mode of the respective LPARs and the amount, if any, of the excess share.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.