Semiconductor structure and circuit including ordered arrangement of graphene nanoribbons, and methods of forming same
US8354296B2 · kind B2 · utility
24Cited by
1References
10Claims
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Key dates
| Filing date | Jan 19, 2011 |
| Grant date | Jan 15, 2013 |
| Priority date | — |
| Expiry date | Mar 6, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor structure including an ordered array of parallel graphene nanoribbons located on a surface of a semiconductor substrate is provided using a deterministically assembled parallel set of nanowires as an etch mask. The deterministically assembled parallel set of nanowires is formed across a gap present in a patterned graphene layer utilizing an electric field assisted assembly process. A semiconductor device, such as a field effect transistor, can be formed on the ordered array of parallel graphene nanoribbons.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.