Charge compensation for operational transconductance amplifier based circuits
US8354887B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2011 |
| Grant date | Jan 15, 2013 |
| Priority date | — |
| Expiry date | May 17, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45356
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In accordance with the teachings described herein, systems and methods are provided for charge compensation. A system may include an operational transconductance amplifier including an input terminal and an output terminal, a transistor network, and a capacitive circuit. The transistor network may be coupled in a feedback loop between the input terminal and the output terminal. The capacitive circuit may be configured to compensate a charge built on a parasitic capacitance of the transistor network during operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.