Display and compensation circuit therefor
US8354983B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2010 |
| Grant date | Jan 15, 2013 |
| Priority date | — |
| Expiry date | Apr 21, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/045
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display includes a scan line, a data line, a pixel circuit, a compensation circuit, a voltage controller, and a data line driver. The data line forms a junction with the scan line. The pixel circuit is disposed at the junction of the scan line and the data line. When the scan line and the data line are driven, the pixel circuit generates a driving current. The compensation circuit generates a comparing signal and a positioning signal based on the driving current. The voltage controller generates a reference voltage that corresponds to the positioning signal with reference to the comparing signal. The data line driver corrects an image signal based on the reference voltage, and drives the data line with the corrected image signal. A compensation circuit for the display is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.