Methods for efficiently repairing embedded dynamic random-access memory having marginally failing cells
US8358548B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2009 |
| Grant date | Jan 22, 2013 |
| Priority date | — |
| Expiry date | Nov 10, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A test system and a method for efficiently repairing marginally failing memory cells in an embedded dynamic random access memory on an integrated circuit identify marginally failing cells in the embedded memory and when two or more marginally failing cells are located in the same column, indicating a partial column failure due to a weak sense amplifier associated with the column, the system and method apply a spare column preferentially to repair the failing cells in the column. The test system can be arranged in a built-in self test engine on the integrated circuit. In an alternative embodiment, the test system can be implemented in test equipment coupled to the integrated circuit that houses the embedded dynamic random-access memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.