Frame level multimedia decoding with frame information table
US8358704B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2007 |
| Grant date | Jan 22, 2013 |
| Priority date | — |
| Expiry date | May 29, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/435
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Apparatus and method to decode video data while maintaining a target video quality using an integrated error control system including error detection, resynchronization and error recovery are described. Robust error control can be provided by a joint encoder-decoder functionality including multiple error resilience designs. In one aspect, error recovery may be an end-to-end integrated multi-layer error detection, resynchronization and recovery mechanism designed to achieve reliable error detection and error localization. The error recovery system may include cross-layer interaction of error detection, resynchronization and error recovery subsystems. In another aspect, error handling of a scalable coded bitstream is coordinated across a base-layer and enhancement layer of scalable compressed video.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.