Reference voltage regulator for eDRAM with VSS-sensing
US8363488B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2011 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | Oct 4, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4094
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a method of operating a reference voltage regulator for an embedded dynamic random access memory (eDRAM) employing VSS-sensing with a reference level, an oscillator sends requests for sampling and correction to a control block between accesses of the eDRAM. The control block sends a pulse defining a time interval during which sampling and correction occurs to a pulse generator. A reference generator provides the reference level to a comparator. The comparator compares the reference level with a sampling of a reference voltage to decide if the reference voltage requires correction. The comparator sends a correction request to a pulse generator if the reference voltage requires correction. The pulse generator generates a correction pulse for a driver according to the correction request from the comparator. The driver adjusts the reference voltage during the correction pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.