Method and device for reconstructing a data clock from asynchronously transmitted data packets
US8363764B2 · kind B2 · utility
0Cited by
2References
40Claims
0Family size
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Inventor
Key dates
| Filing date | Aug 6, 2007 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | Jun 22, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
For reconstructing a data clock from asynchronously transmitted data packets, a control loop is provided which includes a controlled oscillator. An input signal of the control loop is generated on the basis of the received data packets. At least one high-pass type filter is provided in a signal path of the control loop. The data clock for the synchronous output of data is generated on the basis of an output signal of the controlled oscillator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.