Hardware accelerated shortest path computation
US8364717B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2011 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | Sep 17, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F16/29
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The non-negative single-source shortest path (NSSP) problem is solved on a graph by using a preprocessing phase and then, in a query phase, computing the distances from a given source in the graph with a linear sweep over all the vertices. Contraction hierarchies may be used in the preprocessing phase and in the query phase. Optimizations may include reordering the vertices in advance to exploit locality, performing multiple NSSP computations simultaneously, marking vertices during initialization, and using parallelism. Techniques may be performed on a graphics processing unit (GPU). This makes applications based on all-pairs shortest-paths practical for continental-sized road networks. The applications include, for example, computing graph diameter, exact arc flags, and centrality measures such as exact reaches or betweenness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.