Adjustable read reference for non-volatile memory
US8365039B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2008 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | Apr 26, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a non-volatile memory that reads a binary value from a storage cell by comparing the voltage level of a stored charge in that cell against a reference voltage, the accumulated errors in a range of memory locations may be analyzed to determined if there are more errors in one direction than the other (for example, more 0-to-1 errors than 1-to-0 errors). If so, the reference voltage may be adjusted up or down so that subsequent reads from that range may produce approximately the same number of errors in each direction. For multiple-bits-per-cell memories, where there are multiple reference voltages for each cell, each reference voltage may be adjusted separately by keeping track of the errors related to that particular threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.