Processing of data integrity field
US8365057B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2009 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | Nov 1, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A network communication device includes a host interface, which is coupled to communicate with a host processor, having a memory, so as to receive a work request to convey one or more data blocks over a network. The work request specifies a memory region of a given data size, and at least one data integrity field (DIF), having a given field size, is associated with the data blocks. Network interface circuitry is configured to execute an input/output (I/O) data transfer operation responsively to the work request so as to transfer to or from the memory a quantity of data that differs from the data size of the memory region by a multiple of the field size, while adding the at least one DIF to the transferred data or removing the at least one DIF from the transferred data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.