Semiconductor package
US8368085B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2010 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Sep 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/8581
Abstract
A semiconductor package includes at least four lead frames each having an extending portion and a connecting portion, a heat dissipation plate having a top surface and a bottom surface, at least one semiconductor chip positioned on the top surface of the heat dissipation plate. At least one conductive wire electrically connects the chip to the lead frames. An encapsulation covers the lead frames, the heat dissipation plate, the semiconductor chip, and the conductive wires, while the bottom surface of the heat dissipation plate and the extending portions of the lead frames are exposed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.