Programmable frequency synthesizer with I/Q outputs
US8368436B1 · kind B1 · utility
6Cited by
6References
11Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 29, 2010 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Apr 3, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/183
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present invention relate to systems, devices and method of frequency synthesis that generate in-phase and quadrature-phase clock signals at a programmable frequency. The generated frequency, which can range from a fraction to multiples of the input reference frequency, is generated by dividers following a phase-locked loop, thus avoiding the use of a low input reference frequency as well as frequency doubling.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.