Method for memory mapping in a composite RFID tag facility
US8368541B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2012 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Jun 26, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/12
- WIPO fieldIT methods for management
- WIPO sectorElectrical engineering
Abstract
In embodiments of the present invention improved capabilities are described for a method of memory mapping disparate memories on a composite radio frequency identification (RFID) tag, where the RFID tag includes a plurality of individual RFID devices each having a memory store with a physical memory address range and mounted to a common substrate, where at least one of the individual RFID devices comprises memory configuration information, and where a memory addressing facility maps the physical memory address ranges of each of the individual RFID devices to a single logical addressing space and presents the address space as a single memory, where the memory addressing facility is included on a computing facility separate from the composite RFID tag.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.