Time domain voltage step down capacitor based circuit
US8369115B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 2009 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Jun 23, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/07
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A time domain voltage step down capacitor based circuit has an oscillating circuit for generating a clock signal. The circuit also has a capacitor based charge pump circuit for receiving the clock signal and an input voltage signal having an input current and generates an output voltage signal, less than the input voltage signal and an output current greater than the input current. The circuit further comprises a comparator circuit for receiving the output voltage signal, as a first input signal thereto, and a reference voltage signal as a second input signal thereto and compares the first input signal to the second input signal and generates a control signal in response thereto. Finally the control signal is supplied to the oscillating circuit to control the generating of the clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.