Bit mapping scheme for an LDPC coded 32APSK system
US8369448B2 · kind B2 · utility
56Cited by
14References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2006 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Jun 23, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1165
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital communication system, having a transmitter to transmit a digital signal; and a receiver to receive the digital signal; wherein the digital signal utilizes a 32APSK system with FEC coding, and the signal is bit-mapped using gray mapping, and bits of the digital signal are ordered based on the values of a log likelihood ratio from a communications channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.