Patent · US Active

Methods and system for verifying memory device integrity

US8370689B2 · kind B2 · utility

1Cited by
19References
26Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 6, 2010
Grant dateFeb 5, 2013
Priority date
Expiry dateMay 6, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/1004
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method and system for verifying memory device integrity includes identifying at least one memory block corresponding to at least one memory location within a memory device. The memory block is associated with a portion of a file and a checksum representing data within the memory block at a first time. Based at least in part on determining that the memory block is mapped to the same portion of the same file at a second time, it is indicated that the checksum represents expected data within the memory block. A system for verifying memory device integrity is also disclosed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.