Error checking addressable blocks in storage
US8370715B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2007 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Dec 28, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a method, system, and article of manufacture for error checking addressable blocks in storage. Addressable blocks of data are stored in a storage in stripes, wherein each stripe includes a plurality of data blocks for one of the addressable blocks and at least one checksum block including checksum data derived from the data blocks for the addressable block. A write request is received to modify data in one of the addressable blocks. The write and updating the checksum are performed in the stripe having the modified addressable block. An indication is made to perform an error checking operation on the stripe for the modified addressable block in response to the write request, wherein the error checking operation reads the data blocks and the checksum in the stripe to determine if the checksum data is accurate. An error handling operation is initiated in response to determining that the checksum data is not accurate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.