Patent · US Active

Circuit design change and correspondence point finding method between HDL land RLT design

US8370788B2 · kind B2 · utility

4Cited by

1References

20Claims

0Family size

Assignee

MSTAR SEMICONDUCTOR, INC. · TW

Inventors

Chen-Hsing Lo · 東區, TW
Chien-Pang Lu · 東區, TW

Key dates

Filing date	Feb 2, 2010
Grant date	Feb 5, 2013
Priority date	—
Expiry date	Oct 21, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/30
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A change point finding method applied to a logic circuit is provided. The method first defines an indication map and performs a functional equivalent check to judge whether the indication map is correct. When a result is confirmative, the method adds a trap to an RTL HDL of the logic circuit, so that a plurality of comparing points are generated in an APR gate level HDL of the logic circuit. Then the method performs a backward functional equivalent check on the APR gate level HDL of the logic circuit to find a change point according to the comparing points.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.