Tin and tin-zinc plated substrates including Cu3Sn and Cu6Sn5 to improve Ni-Zn cell performance
US8372542B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2012 |
| Grant date | Feb 12, 2013 |
| Priority date | — |
| Expiry date | Apr 20, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E60/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An improved Ni—Zn cell with a negative electrode substrate plated with tin or tin and zinc during manufacturing has a reduced gassing rate. The copper or brass substrate is electrolytic cleaned, activated, electroplated with a matte surface to a defined thickness range, pasted with zinc oxide electrochemically active material, and baked. The defined plating thickness range of 40-80 μIn maximizes formation of an intermetallic compound Cu3Sn that helps to suppress the copper diffusion from under plating layer to the surface and eliminates formation of an intermetallic compound Cu6Sn5 during baking to provide adequate corrosion resistance during battery operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.