Method of digital control of PWM converters achieving fast transient response and low steady-state jittering
US8373402B2 · kind B2 · utility
2Cited by
3References
23Claims
0Family size
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Key dates
| Filing date | Sep 1, 2009 |
| Grant date | Feb 12, 2013 |
| Priority date | — |
| Expiry date | Oct 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K7/08
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A pulse width modulator (PWM) control system for a power converter achieves a fast transient response and low steady-state jittering. The control system manages the ADC sample timing to reduce noise susceptibility, and the ADC includes a regulation bin or dead band to minimize large phase corrections and thus eliminate limit cycling. The PWM module includes a dithering circuit to accumulate fractional PWM control signals to reduce period jitter by increasing the effective resolution of the pulse width modulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.