Electronic load of semiconductor element
US8373448B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 14, 2011 |
| Grant date | Feb 12, 2013 |
| Priority date | — |
| Expiry date | Jun 14, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B20/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An electronic load for a semiconductor element is provided. The electronic load includes at least two slope generating circuits, each of which generates a current according to a current for the electronic load corresponding to an output voltage of a power supply. Each slope generating circuit comprises at least a first slope generating circuit that simulates a first slope when the output voltage of the power supply is between 0V to a rated voltage, and a second slope generating circuit that simulates a second slope when the output voltage of the power supply is higher than the conducting state voltage of the semiconductor element by subtracting the forward bias voltage from the output voltage of the power supply.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.