Computing device and method for clearing data stored in complementary metal-oxide semiconductor chip
US8374046B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Apr 20, 2011 |
| Grant date | Feb 12, 2013 |
| Priority date | — |
| Expiry date | Oct 12, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2143
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for clearing data stored in a complementary metal-oxide semiconductor (CMOS) chip of a computing device. The computing device further includes a CMOS jumper connected to the CMOS chip, and a general purpose input/output (GPIO) interface connected to the CMOS jumper. The method configures a GPIO pin of the GPIO interface as an output port, controls the GPIO pin to generate a GPIO signal with a high level, and outputs the GPIO signal with the high level to the CMOS jumper. After receiving a command of clearing data stored in the CMOS chip, the method pulls down the GPIO signal from the high level to a low level, to clear the data stored in the CMOS chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.