Digital signal analysis with evaluation of selected signal bits
US8374227B2 · kind B2 · utility
1Cited by
3References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 24, 2008 |
| Grant date | Feb 12, 2013 |
| Priority date | — |
| Expiry date | Sep 19, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/205
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention refers to analyzing a digitally modulated test signal received from a device under test -DUT-, comprising providing a first sampled signal by assigning a first sequence of digital values as result of a level comparison of the test signal with a first threshold at first successive timing points, generating a first masking signal indicating matches between a second sequence of digital values expected from the DUT and one or a plurality of first data patterns, and analyzing the first sampled signal in conjunction with the masking signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.