Circuits and methods for operating a virus co-processor
US8375449B1 · kind B1 · utility
51Cited by
37References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2007 |
| Grant date | Feb 12, 2013 |
| Priority date | — |
| Expiry date | Apr 1, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/031
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present invention provide circuits and methods for improved virus processing. As one example, a virus processing system is disclosed that includes an instruction memory and a virus co-processor. The instruction memory includes a first instruction type and a second instruction type intermixed. The virus co-processor is communicably coupled to the instruction memory, and includes at least a first instruction pipe and a second instruction pipe. The first instruction pipe is operable to execute the first instruction type, and the second instruction pipe is operable to execute the second instruction type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.