Patent · US Active

Controlling a frequency locked loop

US8378724B2 · kind B2 · utility

13Cited by

4References

22Claims

0Family size

Assignee

Silicon Laboratories Inc. · US

Inventors

Thomas Saroshan David · Austin, US
Kenneth W. Fernald · Austin, US
Alan L. Westwick · Austin, US

Key dates

Filing date	Dec 22, 2010
Grant date	Feb 19, 2013
Priority date	—
Expiry date	Feb 6, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH03L2207/50
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An apparatus includes a frequency locked loop and a controller. The controller stores a state of the frequency locked loop at which an output signal of the frequency locked loop is locked onto a reference signal and subsequently initializes the frequency locked loop with the stored state to cause the frequency locked loop to relock the output signal to the reference signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.