Planar transformer with boards
US8378775B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2008 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Apr 17, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01F27/2804
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Transformers (1) for transforming primary signals into secondary signals comprise primary and secondary parts that comprise boards (11-14, 21-23) with turns. By introducing distances larger than zero between for example any pair of neighboring boards (11-14, 21-23), parasitic capacitances of the transformers (1) are reduced, and the secondary signals may comprise relatively fast/high voltage pulses having rise times >1 kV/μsec. To reduce proximity effects and any resulting losses, the primary and secondary boards (11-14, 21-23) may be stacked in interleaved ways. Such sandwich constructions reduce leakage inductances. In a particular direction, distances between subsequent primary boards (11-14, 21-23) and distances between subsequent combinations of primary and secondary boards (11-14, 21-23) are to be increased to further reduce capacitive losses in that particular direction. Relatively low voltage differences may be present between relatively close boards (11-14, 21-23), and relatively high voltage differences may be present between boards (11-14, 21-23) that are relatively far away from each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.