Memory relocation in computer for power saving
US8381003B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2010 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Jan 28, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system comprises a computer that includes a plurality of CPU sockets including one or more CPU cores, a crossbar switch, and a memory controller each, and memories connected under the respective plurality of CPU sockets, the plurality of CPU sockets being connected to each other. When all the CPU cores in a CPU socket enter a power saving state and a total amount of memory use falls below a predetermined threshold, the computer relocates contents of the memory connected under the CPU socket to a memory under another CPU socket, thereby eliminating an access to the memory connected under the CPU socket and bringing a whole of the CPU socket into the power saving state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.