Systems and method for transaction stall detection and propagating the result in a multi-core architecture
US8381026B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2010 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Feb 16, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/1034
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed towards systems and methods for determining failure in and controlling access to a shared resource in a multi-core system. In some embodiments of a multi-core system, individual cores may share the same resource. Additionally, the resource may occasionally fail or need to be reset, and the period during which the resource is being reset may be non-instantaneous. In an embodiment without coordination between the cores, one core experiencing a failure may reset the resource. During the period in which the resource is resetting, another core may interpret the reset as a failure and reset the resource. As more cores interpret the resets as failures, they will trigger resets, quickly resulting in the resource being constantly reset and unavailable. Thus, in some embodiments, a coordination system may be utilized to determine failure of a shared resource and control resets and access to the shared resource.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.