Implementing parallel loops with serial semantics
US8381195B2 · kind B2 · utility
2Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 17, 2010 |
| Grant date | Feb 19, 2013 |
| Priority date | — |
| Expiry date | Jul 22, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention extends to methods, systems, and computer program products for implementing parallel loops with serial semantics. Embodiments of the invention provide a semantic transforms and codegen patterns that provide more efficient parallel loop implementations with serial loop semantics. Embodiments of the invention support assignments within for-loop bodies, support break/return constructs within for-loop bodies, and run transformations to covert serial constructs to parallel constructs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.