Patent · US Active

Method for producing a semiconductor component with two trenches

US8383488B2 · kind B2 · utility

3Cited by
3References
10Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 22, 2007
Grant dateFeb 26, 2013
Priority date
Expiry dateOct 8, 2029

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/76224
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method, in which a first isolating trench, filled with a dielectric material, and a second conducting trench, filled with an electrically conductive material, can be produced. To this end, the first and second trenches are etched with different trench widths, so that the first trench is filled completely with the dielectric material after a deposition of a dielectric layer over the entire surface with the edges covered, whereas the wider second trench is covered by the dielectric layer only on the inside walls. By anisotropic back-etching of the dielectric layer, the semiconductor substrate is exposed at the bottom of the second trench. Subsequently, the second trench is filled with an electrically conductive material and then represents a low-ohmic connection from the substrate surface to the buried structure located below the second trench.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.