Bi-directional ESD protection circuit
US8384127B1 · kind B1 · utility
0Cited by
3References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2000 |
| Grant date | Feb 26, 2013 |
| Priority date | — |
| Expiry date | Dec 25, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
Abstract
A structure is designed with an external terminal (100) and a reference terminal (102). A first transistor (106) is formed on a substrate. The first transistor has a current path coupled between the external terminal and the reference terminal. A second transistor (118) has a current path coupled between the external terminal and the substrate. A third transistor (120) has a current path coupled between the substrate and the reference terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.