Reference voltage and impedance calibration in a multi-mode interface
US8384423B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 20, 2008 |
| Grant date | Feb 26, 2013 |
| Priority date | — |
| Expiry date | Dec 24, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller includes a transmit circuit coupled to an output node and a receive circuit coupled to an input node. The transmit circuit transmits first data to a memory device through the output node and the receive circuit is configured to receive second data from the memory device through the input node. The memory controller includes a calibration circuit and control logic coupled to the calibration circuit, where the calibration circuit and the control logic are configured to select a first reference voltage and a driver impedance for the transmit circuit and are configured to select a second reference voltage and a termination impedance for the receive circuit. The first reference voltage, the second reference voltage, the driver impedance and the termination impedance are selected from a set of pre-determined values, which are associated with different signaling modes for communication of the first data and the second data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.