Completion arbitration for more than two threads based on resource limitations
US8386753B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2009 |
| Grant date | Feb 26, 2013 |
| Priority date | — |
| Expiry date | Aug 22, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/485
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mechanism is provided for thread completion arbitration. The mechanism comprises executing more than two threads of instructions simultaneously in the processor, selecting a first thread from a first subset of threads, in the more than two threads, for completion of execution within the processor, and selecting a second thread from a second subset of threads, in the more than two threads, for completion of execution within the processor. The mechanism further comprises completing execution of the first and second threads by committing results of the execution of the first and second threads to a storage device associated with the processor. At least one of the first subset of threads or the second subset of threads comprise two or more threads from the more than two threads. The first subset of threads and second subset of threads have different threads from one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.