Method and apparatus for measuring symbol and bit error rates independent of disparity errors
US8386857B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 11, 2011 |
| Grant date | Feb 26, 2013 |
| Priority date | — |
| Expiry date | Nov 18, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/244
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A test and measurement instrument includes a pattern detector for detecting a beginning sequence in a signal under test (SUT), and generates a synchronization signal. In response to the synchronization signal, a memory outputs a reference test pattern. A symbol comparator compares the reference test pattern with the SUT. The symbol comparator can produce a symbol error rate. One or more 8b to 10b converters receives the SUT from the input and the digitized data from the memory, and converts the data from an 8b coded format to a 10b coded format. A bit comparator compares the 10b coded reference test pattern with the 10b coded SUT in response to the symbol comparator. The bit comparator is coupled to a bit error counter, which produces a bit error rate independent of any disparity errors that may be present in the incoming digitized data received by the test and measurement instrument.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.