Method for fabricating semiconductor device
US8389351B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2011 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Oct 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
Abstract
A method for fabricating a semiconductor device is disclosed. A resist pattern is formed on a surface of a semiconductor layer in which a first layer and a second layer are sequentially formed on a substrate. A gate recess is formed by removing a part or the entire second layer in an opening area of the resist pattern. The resist pattern is removed. A dry etching residue attached to a bottom surface and lateral surfaces of the gate recess is removed after the resist pattern is removed. An insulating film is formed on the bottom surface, the lateral surfaces, and the semiconductor layer after the dry etching residue is removed. A gate electrode is formed via the insulating film on an area where the gate recess is formed. A source electrode and a drain electrode are formed on the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.