Reverse side engineered III-nitride devices
US8389977B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2009 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Feb 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/411
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Group III-nitride devices are described that include a stack of III-nitride layers, passivation layers, and conductive contacts. The stack includes a channel layer with a 2DEG channel, a barrier layer and a spacer layer. One passivation layer directly contacts a surface of the spacer layer on a side opposite to the channel layer and is an electrical insulator. The stack of III-nitride layers and the first passivation layer form a structure with a reverse side proximate to the first passivation layer and an obverse side proximate to the barrier layer. Another passivation layer is on the obverse side of the structure. Defected nucleation and stress management layers that form a buffer layer during the formation process can be partially or entirely removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.