Low distortion MOS attenuator
US8390359B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2010 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Dec 10, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/245
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An attenuation circuit uses a voltage controlled variable resistance transistor as a signal attenuator for receivers operating in the zero Hz to about 30 MHz range. The transistor functions in the linear region to linearize the transistor resistance characteristics used for signal attenuation. In an exemplary application, the attenuation circuit is used as an RF attenuator for AM radio broadcast receivers and amplifiers with automatic gain control. Multiple attenuation circuits can be coupled in parallel, each attenuation circuit having a different sized variable resistance transistor, to form sequentially activated stages that increase the range of attenuation while minimizing distortion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.