Overvoltage and overcurrent protection scheme
US8390974B2 · kind B2 · utility
0Cited by
11References
14Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 18, 2010 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Feb 10, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0826
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed are methods and corresponding systems to detect and prevent and/or eliminate overload conditions for a transistor. According to an embodiment, a method includes providing an input signal to a base terminal of a transistor for a first amount of time, determining if an overload condition exists at the transistor, disabling the transistor for a second amount of time when the overload condition exists at the transistor, and providing the communication signal to the base terminal upon expiration of the second amount of time. Additional overload conditions can be checked upon expiration of the second amount of time as well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.