Method and apparatus for advanced encryption standard (AES) block cipher
US8391475B2 · kind B2 · utility
15Cited by
0References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2007 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Mar 4, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/125
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The speed at which encrypt and decrypt operations may be performed in a general purpose processor is increased by providing a separate encrypt data path and decrypt data path. With separate data paths, each of the data paths may be individually optimized in order to reduce delays in a critical path. In addition, delays may be hidden in a non-critical last round.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.