Method for controlling critical dimension in semiconductor production process, and semiconductor manufacturing line supporting the same
US8392010B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2010 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Jul 20, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A critical dimension controlling method in a semiconductor production process includes determining whether a model is to undergo a discontinuous production process when a run is inserted in a semiconductor manufacturing line, applying an offset for said model or a common offset for a model group including said model according to the determination, executing a production process in dependence upon a process variation along with the offset for the model or the common offset for the model group, and measuring an actual critical dimension in the production process. The offset for the model is calculated based on a previously measured actual critical dimension, and the calculated offset for the model is applied to the calculation of the common offset for the model group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.