ASCII to binary floating point conversion of decimal real numbers on a vector processor
US8392489B2 · kind B2 · utility
1Cited by
9References
1Claims
0Family size
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Key dates
| Filing date | Feb 15, 2008 |
| Grant date | Mar 5, 2013 |
| Priority date | — |
| Expiry date | Jan 5, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/24
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system, method, and apparatus for converting a decimal real number in ASCII format to a decimal real number in floating point binary decimal format in a vector processor are described. The method results in the performance of the conversion in a branchless manner and in a constant-time regardless of the size of the ASCII string, within a given range of sizes provided for by the vector processor architecture. The method may take advantage of the single instruction multiple data (SIMD) feature of the vector processor, although it is not restricted to a single instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.