Resist pattern protection technique for double patterning application
US8394280B1 · kind B1 · utility
152Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2009 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | May 21, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0337
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of patterning a material are disclosed. A first resist pattern is formed on a field. A protective layer is formed over the first resist pattern and at least a portion of the field. A second resist pattern is formed over a portion of the protective layer. A portion of a material to be patterned deposited adjacent to the first and second resist patterns is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.