Substrate-penetrating electrical connections
US8395057B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2007 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Oct 23, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49746
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A wafer assembly (30) includes a substrate (71), in turn including a wafer (70) or a stack of wafers. The wafer assembly (30) further includes an electrical connection (32) arranged through at least a part of the substrate (71). The electrical connection (32) is made by low-resistance silicon. The electrical connection (32) is positioned in a hole (84) penetrating at least a part of the substrate (71). A surface (78) of the substrate (71) confining the hole (84) is electrically insulating. The electrical connection (32) has at least one protrusion (75), which protrudes transversally to a main extension (83) of the hole (84) and the protrusion (75) protrudes outside a minimum hole diameter (85), as projected in the main extension (83) of the hole (84). Preferably, the protrusion (75) is supported by a support surface (81) of the substrate (71). A manufacturing method is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.