Systems and methods for fabricating self-aligned memory cell
US8395199B2 · kind B2 · utility
3Cited by
178References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 25, 2006 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Jul 31, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
Abstract
Systems and methods are disclosed to form a resistive random access memory (RRAM) by forming a first metal electrode layer; depositing an insulator above the metal electrode layer and etching the insulator to expose one or more metal portions; depositing a Pr1-XCaXMnO3 (PCMO) layer above the insulator and the metal portions, wherein X is between approximately 0.3 and approximately 0.5, to form one or more self-aligned RRAM cells above the first metal electrode; and depositing a second metal electrode layer above the PCMO layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.