Signal amplification circuits for receiving/transmitting signals according to input signal
US8395452B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 11, 2012 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Oct 11, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45481
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An exemplary signal amplification circuit includes an input stage, a plurality of output stages and a selecting stage. The input stage has an input node for receiving an input signal and an output node for outputting an intermediate signal. The output stages are coupled to a plurality of output ports of the signal amplification circuit, respectively. Each output stage generates a corresponding processed signal to a corresponding output port according to a gain and the intermediate signal when enabled. The selecting stage selectively couples the output node of the input stage to at least one of the output stages. The signal amplification circuit outputs a first number of processed signal(s) when operated under a first operational mode, and outputs a second number of processed signal(s) when operated under a second operational mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.